Gap between TOSCA DM and low level used
- libo zhu
there are some gaps between DM defined in TOSCA and the format used from OOF/Multicloud/AAI/Policy perspective.
the high-level TOSCA DM refers to Supported HPA Capability Requirements(DRAFT)
the OOF/MultiCloud/AAI/Policy refer to HPA Policies and Mapping
the black and strikethrough item could be found/matched the hpa-feature-attributes used in currently OOF/Policy/MultiCloud/AAI. previous GAP PPT ONAP DM Gap.pptx
we need think a way to do an alignment.
TOSCA DM | Capability Name |
|---|---|
VDU CPU Requirements | cpuModelSpecificationBinding instructionSetRequirements simultaneousMultiThreading hypervisorConfiguration computeRas cpuModel directIoAccessToCache accelerator measuredLaunchEnvironment secureEnclave numVirtualCpu virtualCpuClock logicalCpuPinningPolicy logicalCpuThreadPinningPolicy |
VDU Memory Requirements | attributeReference schemaVersion schemaSelector memoryPageSize numberOfPages memoryAllocationPolicy memoryType memorySpeed memoryRas memoryBandwidth processorCacheAllocationType processorCacheAllocationSize |
VDU Storage Requirements | storageIops storageResilencyMechanism |
Logical Node Compute Requirements | numberCpu |
Logical Node Memory Requirements | localNumaMemorySize |
Logical Node i/O Requirements | pciVendorId pciDeviceId pciNumDevices pciAddress pciDeviceLocalToNumaNode |
Network Interface Requirements | nicFeature dataProcessingAccelerationLibray interfaceType vendorSpecificNicFeature |
Hpa-feature-Attributes | hpa-feature(Group) |
|---|---|
numCpuSockets numCpuCores numCpuThreads | cpuTopology |
numVirtualCpu virtualMemSize | basicCapabilities |
dataProcessingAccelerationLibrary | ovsDpdk |
logicalCpuThreadPinningPolicy logicalCpuPinningPolicy | cpuPinning |
numaNodes numaCpu-N numaMem-N | numa |
pciCount pciVendorId pciDeviceId functionType | pciePassthrough |
diskSize ephemeralDiskSize swapMemSize | localStorage |
instructionSetExtensions | instructionSetExtensions |
memoryPageSize | hugePages |