Title: Hardware Platform Enablement In ONAP  
Owner: Alex Vul
Creator: Alex Vul Nov 30, 2017
Last Changed by: Alex Vul Sept 19, 2018
Tiny Link: (useful for email) https://lf-onap.atlassian.net/wiki/x/cRT4
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ONAP Wiki (9)
    Page: 2018-01-19 Meeting notes
    Page: 2018-01-26 Meeting notes
    Page: 2018-02-02 Meeting notes
    Page: Beijing Functional Requirements
    Page: Beijing Release Integration Testing Status
    Page: Hardware Platform Requirements
    Page: Policy R2 Beijing M1 Release Planning Template
    Page: VF-C Casablanca M1 Release Planning
    Page: VF-C Dublin M1 Release Planning
Hierarchy
Children (28)
    Page: Blocking Issues to HPA Casablanca Integration
    Page: Conversion from high-level TOSCA DM to low-level format
    Page: Discovery of HPA related information in MultiCloud
    Page: DRAFT ONAP Virtual Network Function Descriptor (VNFD) based on TOSCA Simple YAML Profile Specification
    Page: FPGA and GPU support
    Page: Gap between TOSCA DM and low level used
    Page: HPA & Cloud Agnostic Intent - R3 Test Plan (In Progress)
    Page: HPA - SR-IOV NIC design
    Page: HPA - Telemetry OOF and A&AI
    Page: HPA Architecture & Design Considerations
Labels
Global Labels (1)
Time Editor  
Sept 19, 2018 17:21 Alex Vul View Changes
Sept 19, 2018 17:21 Alex Vul View Changes
Sept 19, 2018 17:02 Alex Vul View Changes
Sept 19, 2018 15:39 Alex Vul View Changes
Sept 07, 2018 14:19 Srinivasa Addepalli  
Outgoing Links
External Links (4)
    https://docs.openstack.org/nova/pike/admin/cpu-topologies.h…
    https://networkbuilders.intel.com/network-technologies/enha…
    https://software.intel.com/en-us/articles/openstack-epa-fea…
    events17.linuxfoundation.org/sites/events/files/slides/High…
ONAP Wiki (5)     Page: HPA Impact on the SDC Project
    Page: HPA Impact on the AAI Project
    Page: HPA Impact on the VNF SDK Project
    Page: HPA & Cloud Agnostic Intent - R3 Test Plan (In Progress)
    Page: HPA impact on the SO project