Integration Testing Schedule, 10-5-2017

Owned by Helen Chen
Last updated: Oct 06, 2017 by Yang Xu
1 min read

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Green slots are available, gray slots are unavailable

Time


Sync up / ONAP Platform / vFW/vDNS

https://zoom.us/j/4466668888

vCPE (Intel/Windriver Lab)

https://zoom.us/j/4466667777

VoLTE (CMCC Lab)

https://zoom.us/j/4466667777

6:00 AM (PDT)

  1. vFW / vLB instantiation

  2. Closed Loop (if possible)

We hope to get support from VID, SDC, A&AI, SO and SDNC team.

Integration Testing Notes, 10-5-2017

Integration Testing 10052017.mp4

Integration Testing 10052017.txt







6:30 AM (PDT)





7:00 AM (PDT)





7:30 AM (PDT)





8:00 AM (PDT)





8:30 AM (PDT)

Sync up

not available

not available

9:00 AM (PDT)







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10:30 AM (PDT)







11:00 AM (PDT)







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12:00 PM (PDT)







12:30 PM (PDT)







13:00 PM (PDT)







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14:00 PM (PDT)







14:30 PM (PDT)







15:00 PM (PDT)







15:30 PM (PDT)